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IDF2012: Xilinx demonstrates Industry`s First QPl 1.1 Interface with FPGAs.
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Xilinx, Inc. today announced at the Intel
Developer Forum (IDF) the
industry's first demonstration of a field programmable gate array (FPGA)
interfacing to an Intel Sandy Bridge Xeon Processor using the QuickPath
Interconnect (QPI) protocol.
Xilinx's QPI solution provides developers a low-latency, high-performance
link to Intel Xeon Processors from Xilinx®
All Programmable FPGAs. This
solution achieves the best possible overall system performance and power
consumption by leveraging Xilinx FPGAs high performance processing and
flexible I/O capabilities. IDF attendees can see the live demonstration at
Xilinx's booth #426.
"With today's demonstration, Xilinx now
has the first FPGA-based low-latency, high-bandwidth interconnect
intellectual property (IP) core for Intel Xeon processor-based systems,"
said Nick Possley, senior director of wired communications at Xilinx.
"This means Xilinx solutions can now play a major role in reducing CAPEX
and OPEX for Data Centers by enabling higher compute performance within a
given server form factor either by directly accelerating applications or
offloading I/O intensive operations."
Hardware designers can start developing a
QPI-based solution today using the Xilinx QPI development platform complete
with IP core and a development module designed to plug directly into an
existing Intel Sandy Bridge CPU socket.
The QPI 1.1 full width link between the Xilinx Virtex®-7
FPGA and the Intel Sandy
Bridge CPU operates at 6.4 Gb/s per lane over 20 lanes. Xilinx has created a
custom development board that mounts a Virtex-7 FPGA directly in an Intel
Sandy Bridge Xeon CPU socket. The demonstration leverages the Native Loopback
(NLB) example hardware and software to validate the data exchange between
FPGA and CPU. The QPI interface enables the Intel Xeon CPU to take advantage
of the Xilinx FPGA's ability to do parallel processing and speed up high
computation applications for coprocessing and/or application acceleration.
Developers can also use the Xilinx solution to enable a high-performance,
low-latency network interface controller and I/O connectivity expansion
taking advantage of the cache coherent nature of the QPI protocol to more
efficiently handle packet processing.
Availability
The Xilinx QPI solution consisting of an IP
core, reference design and Virtex-7
FPGA development board will
be commercially available from Xilinx at the end of the year. For more
information, please contact your local sales representative.
About Xilinx
Xilinx is the world's leading provider of All
Programmable devices, SoCs and 3D ICs. These industry-leading devices are
coupled with a next-generation design environment and IP to serve a broad
range of customer needs, from programmable logic to programmable systems
integration. For more information, visit www.xilinx.com.
Xilinx, the Xilinx logo, Artix, ISE, Kintex,
Spartan, Virtex, Zynq, Vivado and other designated brands included herein are
trademarks of Xilinx in the United
States and other countries. All other
trademarks are the property of their respective owners.
Xilinx
Bruce Fienberg
408-879-4631
Bruce.Fienberg@xilinx.com
SOURCE Xilinx, Inc.
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