(iTers News) – Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced that its DesignWare USB PHY and Controller IP has surpassed 3,000 design wins, and that its DesignWare PHY and Controller IP for PCI Express has surpassed 1,000 design wins. More than 600 companies have selected Synopsys DesignWare IP for USB and PCI Express to accelerate their designs because the IP offers high quality, standards compliance, and third-party interoperability testing along with the key features needed to support their designs' performance, power and area requirements.
DesignWare USB Core, PHY and Verification IP
"We chose DesignWare IP to improve our overall quality and time-to-market," said John Cummins, senior vice president, worldwide sales and marketing, DisplayLink. "We selected Synopsys because of their demonstrated high-quality USB IP that has been implemented in thousands of designs, and we were confident that the IP would function as required. With Synopsys USB 3.0 IP, we achieved first-pass silicon success and shipped millions of USB 3.0 products on schedule."
"We have used Synopsys IP in our multimedia SoCs for more than ten years as we believe Synopsys provides the most complete and flexible USB and PCI Express IP solutions in the market," said Jessy Chen, executive vice president of Realtek. "Using high-quality DesignWare IP in our designs enabled us to reduce our IP integration risk and be the industry's first to earn USB-IF certification for a USB 3.0 card reader."
DesignWare IP Solutions for PCI Express
Synopsys' complete USB and PCI Express solutions include controller IP, PHY IP, verification IP and the HAPS FPGA-based prototyping platform, which together simplify the IP integration and validation process, and accelerate time-to-market. DesignWare USB IP has been certified by the USB-IF standards body more than 100 times and DesignWare IP for PCI Express has been certified by PCI-SIG more than 50 times, ensuring interoperability with billions of devices worldwide.
In addition to supporting SuperSpeed, High-Speed, Full-Speed and Low-Speed USB modes, DesignWare USB 3.0 IP enables the fastest SuperSpeed USB data transfer speeds while lowering overall power consumption for mobile SoC designs. The low-power, low-latency DesignWare IP for PCI Express 3.0 provides full coverage of the PCIe specification (1.x, 2.x, 3.0, M‑PCIe and optional features) across Switch, Endpoint, Dual Mode, and Root Complex port types, with embedded DMA, SR-IOV, and ARM AMBA 4 AXI, AMBA 3 AXI and AMBA AHB interfaces to meet the requirements of the enterprise, consumer and mobile markets. Synopsys has ported DesignWare PHY IP for USB and PCI Express to more than 140 process technologies; the IP is readily available from all leading foundries in processes from 180-nanometer (nm) to 20-nm, providing designers with easily accessible, silicon-proven IP.
"To accelerate our time-to-market in the highly competitive cable operator space, the IP that we use must be rock solid," said Kent Goodin, executive vice president of engineering, Zenverge. "After achieving first-pass silicon success using Synopsys DesignWare IP for USB 2.0 and PCI Express 1.0 in our ZN200 Quad Stream Transcoders, it was a clear decision to use Synopsys USB 3.0 and PCI Express 2.0 IP solutions in our next-generation transcoders. The IP consistently works as advertised and allows us to focus our resources on creating our own innovative technology."
"As the leading provider of USB and PCI Express IP, and with 28 combined years of participation in the USB-IF and PCI-SIG standards bodies, Synopsys is in a unique position to fulfill customers' needs for high quality, proven IP solutions that help them deliver innovative products," said John Koeter, vice president of marketing for IP and systems at Synopsys. "With more than 1,900 IP engineers and significant investment in our design, lab and compute infrastructure, Synopsys continues to provide designers with the trusted IP needed to help them achieve silicon success and meet their time-to-market pressures."