Hi. Our hardware design includes an 2 * Ethernet 1000Base-X or SGMII IP. (There is also another gig_ethernet_pcs_pma_0 that is connected to ENET1_XXX which cannot be seen the picture below).
My problem is about reading PHY registers. Both gig_ethernet_pcs_pma_0 and gig_ethernet_pcs_pma_1 seem to be configured equally. When my code tries the read PHY control registers , value returned from gig_ethernet_pcs_pma_0 is all 1’s (11111……).
Reading from gig_ethernet_pcs_pma_1 returns the expected value (which is 1 0101 0100 0000 in my case)
From the document of IP, I see that some bits of the control register should be 0 by default. For example first 5 bits are reserved and must be 00000 and these bits are write protected. But I read 1111….11111. What I tried so far are:
I interchanged the read sequence but that didn’t make any difference, gig_ethernet_pcs_pma_0 is always read as 1’s
My hardware friend interchanged the connections between ENET0 and ENET1 and IP Cores but this didn’t make any difference
For the first time, PHY addresses of IP’s were both 1, I changed phy addr of gig_ethernet_pcs_pma_1 to 2, left gig_ethernet_pcs_pma_0 as 1, didn’t work
The problem seems to be about gig_ethernet_pcs_pma_0 core. What can be the source of this problem? What should I try?
Waiting for your suggestions
Thanks